A technical paper titled “Review of virtual wafer process modeling and metrology for advanced technology development” was published by researchers at Coventor Inc., Lam Research. “Semiconductor logic ...

A research team led by Professor Sanghyeon Choi from the Department of Electrical Engineering and Computer Science at DGIST ...

Rapidus on Friday announced that it had begun prototyping of test wafers with 2nm gate-all-around (GAA) transistor structures at its IIM-1 facility in Japan. The company confirmed that early test ...

One of the main challenges in developing semiconductor chip technology is making electronic components smaller and more effective. This difficulty is most noticeable in lithography, which is the ...

Full-blown process excursions that affect every wafer are comparatively easy for fabs to detect and fix. However, “onesie-twosie,” lower-volume excursions can go unresolved for months or even years.

BEDFORD, Mass. & SEOUL, South Korea--(BUSINESS WIRE)--Silicon wafer manufacturer 1366 Technologies together with its strategic partners, Hanwha Q CELLS Malaysia Sdn. Bhd. and parent company Hanwha Q ...

In order to continuously control the thickness, the interferoMETER IMS5420 series white light interferometers were developed.

A new memristor integration breakthrough by DGIST could revolutionize AI hardware, enabling ultra-dense, energy-efficient chips that mimic the human brain’s architecture—overcoming long-standing ...

The German tooling firm announces the development of a new texturing process for multicrystalline wafers using diamond wire sawing on its LINEX inline system. Company believes process can boost multi ...

In an update to its International Technology Roadmap for Photovoltaics, German engineering association the VDMA notes standardization of wafer size is a topic of great interest to the country’s PV ...

Wafer-Scale Integration of Next-Generation Memristor Semiconductors: Establishing a World-Class Platform for High-Density, ...