Semiconductor Engineering

EDA Tool To Detect SW-HW Vulnerabilities Ensuring Data Confidentiality In A RISC-V Architecture

A technical paper titled “SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors” was published by researchers at RWTH Aachen University, Robert Bosch, and Newcastle University ...
Design-Reuse

Fragmentation to Standardization: Evaluating RISC-V’s Path Across Data Centers, Automotive, and Security

Despite being preferred by newly established companies that had the same needs for ISAs as their competition, they lacked the time and resources to deal with costly, complex proprietary ISAs. While ...
Forbes

RISC-V’s Ascent Could Reshape The Global Compute Landscape

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...